About using the Intel "Transactional Synchronization Extension"† (TSX) from the upcoming Haswell processors to provide a "fast path" to lock code. The code would first attempt to just do what it wants, but within a memory transaction. If the memory transaction cannot commit, there is a conflict from another core or thread, then it goes to the regular slow path with the locks. If applied at the right granularity almost all of your atomic operations should succeed with the TSX path and you will rarely invoke the heavier lock based code.

There is talk of performance measurement, but no numbers in the article, probably because Haswell isn't released.

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† http://software.intel.com/en-us/blogs/2012/11/06/exploring-i...